Phase Assignment for the Synthesis of Low Power Domino Circuits

Abstract

High performance circuit techniques such as domino logic have migrated From the microprocessor world into more mainstream ASIC designs but domino logic conies at a heavy cost in terms of total power dissipation. A set of results related to automated phase assignment for the synthesis of low-power domino circuits is presented: (1) it is demonstrated that the choice of phase assignment at the primary outputs of a circuit can significantly impact power dissipation in the domino block, and (2) a method to determine a phase assignment that minimises power consumption in the final circuit implementation on is proposed. Preliminary experimental results on a mixture of public domain benchmarks and real industry circuits show potential power savings as high as 34% over the minimum area realisation of the logic. Furthermore, the low-power synthesised circuits still meet timing constraints