Browse "School of Electrical Engineering(전기및전자공학부)" by Subject Random access memory
Showing results 1 to 14 of 14
| A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory With Computation Reuse Um, Soyeon; Kim, Sangyeob; Kim, Sangjin; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.68, no.5, pp.1605 - 1609, 2021-05 |
| A Supply-Noise-Induced Jitter Canceling Adaptive Filter for LPDDR5 Mobile DRAM Jung, Yeonwook; Lee, Seongseop; Kim, Hyojun; Cho, SeongHwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.1, pp.270 - 278, 2023-01 |
| An Energy-Efficient Deep Convolutional Neural Network Inference Processor With Enhanced Output Stationary Dataflow in 65-nm CMOS Sim, Jaehyeong; Lee, Somin; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.28, no.1, pp.87 - 100, 2020-01 |
| Data Sanitization of SRAM by Thermal Distortion Han, Joon-Kyu; Han, Seong-Joo; Yu, Ji-Man; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.68, no.7, pp.3706 - 3710, 2021-07 |
| DC-PCM: Mitigating PCM Write Disturbance with Low Performance Overhead by Using Detection Cells Choi, Jungwhan; Jang, Jaemin; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.68, no.12, pp.1741 - 1754, 2019-12 |
| Decoupled SSD: Reducing Data Movement on NAND-Based Flash SSD Kim, Jiho; Jung, Myoungsoo; Kim, John, IEEE COMPUTER ARCHITECTURE LETTERS, v.20, no.2, pp.150 - 153, 2021-07 |
| Hybrid Memory Buffer Microarchitecture for High-Radix Routers Li, Cunlu; Dong, Dezun; Liao, Xiangke; Kim, John, IEEE TRANSACTIONS ON COMPUTERS, v.71, no.11, pp.2888 - 2902, 2022-11 |
| Memory Pooling with CXL Gouk, Donghyun; Kwon, Miryeong; Bae, Hanyeoreum; Lee, Sangwon; Jung, Myoungsoo, IEEE MICRO, v.43, no.2, pp.48 - 57, 2023-03 |
| Method to Achieve the Morphotropic Phase Boundary in HfxZr1-xO2 by Electric Field Cycling for DRAM Cell Capacitor Applications Kim, Seongho; Lee, Seung Hwan; Kim, Min Ju; Hwang, Wan Sik; Jin, Hyun Soo; Cho, Byung Jin, IEEE ELECTRON DEVICE LETTERS, v.42, no.4, pp.517 - 520, 2021-04 |
| S-FLASH: A NAND Flash-based Deep Neural Network Accelerator Exploiting Bit-level Sparsity Kang, Myeonggu; Kim, Hyeonuk; Shin, Hyein; Sim, Jaehyeong; Kim, Kyeonghan; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.71, no.6, pp.1291 - 1304, 2022-06 |
| Signal Integrity and Computing Performance Analysis of a Processing-In-Memory of High Bandwidth Memory (PIM-HBM) Scheme Kim, Seongguk; Kim, Subin; Cho, Kyungjun; Shin, Taein; Park, Hyunwook; Lho, Daehwan; Park, Shinyoung; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.11, no.11, pp.1955 - 1970, 2021-11 |
| SRAM-Based Computing-in-Memory Macro With Fully Parallel One-Step Multibit Computation Choi, Edward Jongyoon; Choi, Injun; Jeon, Chanhee; Yun, Gichan; Yi, Donghyeon; Ha, Sohmyung; Chang, Ik-Joon; et al, IEEE SOLID-STATE CIRCUITS LETTERS, v.5, pp.234 - 237, 2022 |
| Thermal and Signal Integrity Co-Design and Verification of Embedded Cooling Structure With Thermal Transmission Line for High Bandwidth Memory Module Son, Keeyoung; Kim, Seongguk; Park, Hyunwook; Shin, Taein; Kim, Keunwoo; Kim, Minsu; Sim, Boogyo; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.12, no.9, pp.1542 - 1556, 2022-09 |
| Understanding the Implication of Non-Volatile Memory for Large-Scale Graph Neural Network Training Lee, Yunjae; Kwon, Youngeun; Rhu, Minsoo, IEEE COMPUTER ARCHITECTURE LETTERS, v.20, no.2, pp.118 - 121, 2021-07 |
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