Browse "School of Electrical Engineering(전기및전자공학부)" by Subject PLL and all-digital PLL (ADPLL)
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| A 7 bit, 3.75 ps Resolution Two-Step Time-to-Digital Converter in 65 nm CMOS Using Pulse-Train Time Amplifier Kim, Kwang-Seok; Kim, Young-Hwa; Yu, Won-Sik; Cho, Seong-Hwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.48, pp.1009 - 1017, 2013-04 |
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