Browse "School of Electrical Engineering(전기및전자공학부)" by Author Yang, BD
Showing results 1 to 12 of 12
| A Direct Digital Frequency Synthesizer Using A New ROM Compression Method Kim, Lee-Sup; Yang, BD, ESSCIRC 2001, 2001 |
| A HIGH SPEED DIRECT DIGITAL FREQUENCY SYNTHESIZER USING A LOW POWER PIPELINED PARALLEL ACCUMULATOR Yang, BD; Kim, Lee-Sup; Yu, HK, ISCAS 2002, pp.V-373 - V-376, IEEE, 2002-05-26 |
| A low power charge recycling ROM architecture Kim, Lee-Sup; Yang, BD, ISCAS 2001, 2001 |
| A low-power CAM using pulsed NAND-NOR match-line and charge-recycling search-line driver Yang, BD; Kim, Lee-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.40, pp.1736 - 1744, 2005-08 |
| A low-power charge-recycling ROM architecture Yang, BD; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.11, pp.590 - 600, 2003-08 |
| A low-power ROM using charge recycling and charge sharing techniques Yang, BD; Kim, Lee-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.38, pp.641 - 653, 2003-04 |
| A low-power ROM using single charge-sharing capacitor and hierarchical bit line Yang, BD; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.14, pp.313 - 322, 2006-04 |
| A low-power SRAM using hierarchical bit line and local sense amplifiers Yang, BD; Kim, Lee-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.40, pp.1366 - 1376, 2005-06 |
| An 800-MHz low-power direct digital frequency synthesizer with an on-chip D/A converter Yang, BD; Choi, JH; Han, SH; Kim, Lee-Sup; Yu, HK, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.39, pp.761 - 774, 2004-05 |
| High-Speed and Low-Swing On-Chip Bus Interface Using Threshold Voltage Swing Driver and Dual Sensing Amplifie Receiver Kim, Lee-Sup; Yang, BD, European Solid State Circuit Conference, 2000 |
| Low-power charge-sharing ROM using dummy bit lines Yang, BD; Kim, Lee-Sup, ELECTRONICS LETTERS, v.39, no.14, pp.1041 - 1042, 2003-07 |
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