Browse "School of Electrical Engineering(전기및전자공학부)" by Author Kim, Ye Dam
Showing results 1 to 7 of 7
| A 25kHz-BW 97.4dB-SNDR 100.2dB-DR 3rd-order SARAssisted CT DSM with 1-0 MASH and DNC Lozada, Kent Edrian; Lee, Dong-Hun; Kim, Ye Dam; Kim, Ho-Jin; Cho, Youngjae; Choi, Michael; Ryu, Seung-Tak, 2023 IEEE Asian Solid-State Circuits Conference, IEEE, 2023-11-08 |
| A 40nm CMOS 12b 200MS/s Single-amplifier Dual-residue Pipelined-SAR ADC Seo, Min-Jae; Kim, Ye Dam; Chung, Jae-Hyun; Ryu, Seung-Tak, 39th Symposium on VLSI Technology / 33rd Symposium on VLSI Circuits, pp.C72 - C73, IEEE, 2019-06-11 |
| A 6b 28GS/s Four-channel Time-interleaved Current-Steering DAC with Background Clock Phase Calibration Kim, WooCheol; Jo, Dong Shin; Roh, Yi-Ju; Kim, Ye Dam; Ryu, Seung-Tak, 39th Symposium on VLSI Technology / 33rd Symposium on VLSI Circuits, pp.C138 - C139, IEEE, 2019-06-11 |
| A Single-Supply Buffer-Embedding SAR ADC with Skip-Reset having Inherent Chopping Capability Seo, Min-Jae; Jin, Dong-Hwan; Kim, Ye Dam; Kim, Jong-Pal; Chang, Dong-Jin; Lim, Won-Mook; Chung, Jaehyun; et al, 15th IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, pp.189 - 192, Institute of Electrical and Electronics Engineers Inc., 2019-11 |
| An 81.2dB-SNDR Dual-Residue Pipeline ADC with a 2nd-Order Noise-Shaping Interpolating SAR ADC Chung, Jaehyun; Kim, Ye Dam; Park, Chang Un; Park, Kunwoo; Seo, Min-Jae; Ryu, Seung-Tak, 44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023, IEEE, 2023-04-25 |
| Analog-to-digital converter (ADC) with reset skipping operation and analog-to-digital conversion method Kim, JongPal; Kim, Ye Dam; Ryu, Seung-Tak; Seo, Min Jae; Jin, Dong Hwan |
| Continuous-time incremental delta sigma modulator for bio-signal acquisition = 생체 신호 수집을 위한 연속시간 인크리멘탈 델타 시그마 아날로그-디지털 변환기link Kim, Ye Dam; Ryu, Seung-Tak; et al, 한국과학기술원, 2019 |
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