Browse "School of Electrical Engineering(전기및전자공학부)" by Subject TSV
Showing results 10 to 13 of 13
| Temperature-dependent through-silicon via (TSV) model and isolation characteristics = 온도에 의존하는 관통 실리콘 비아 모델과 아이솔레이션 특성link Lee, Man-Ho; 이만호; et al, 한국과학기술원, 2012 |
| Through-Silicon Via Capacitance-Voltage Hysteresis Modeling for 2.5-D and 3-D IC Kim, Dong-Hyun; Kim, Youngwoo; Cho, Jong-Hyun; Bae, Bumhee; Park, Junyong; Lee, Hyunsuk; Lim, Jaemin; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.7, no.6, pp.925 - 935, 2017-06 |
| Through-Silicon-Via-Based Decoupling Capacitor Stacked Chip in 3-D-ICs Song, Eun-Seok; Koo, Kyoung-Choul; Pak, Jun-So; Kim, Joung-Ho, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.3, no.9, pp.1467 - 1480, 2013-09 |
| Vertical Noise Coupling From On-Chip Switching-Mode Power Supply in a Mixed-Signal Stacked 3-D-IC Koo, Kyoung-Choul; Kim, Myung-Hoi; Kim, Jonghoon J.; Kim, Joung-Ho; Kim, Ji-Seong, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.3, no.3, pp.476 - 488, 2013-03 |
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