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Pulse width allocation with clock skew scheduling for optimizing pulsed latch-based sequential circuits Lee, H; Paik, S; Shin, Youngsoo, 2008 International Conference on Computer-Aided Design, ICCAD, pp.224 - 229, ACM SIGDA and IEEE CEDA, 2008-11-10 |
Register allocation for high-level synthesis using dual supply voltages Shin, I; Paik, S; Shin, Youngsoo, 2009 46th ACM/IEEE Design Automation Conference, DAC 2009, pp.937 - 942, ACM Special Interest Group on Design Automation (SIGDA), 2009-07-26 |
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