Browse "School of Electrical Engineering(전기및전자공학부)" by Subject heterostructure
Showing results 5 to 8 of 8
| Strained Si/SiGe channel with buried Si0.99C0.01 for improved drivability, gate stack integrity and noise performance Loh, WY; Zang, H; Oh, HJ; Choi, KJ; Nguyen, HS; Lo, GQ; Cho, Byung Jin, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.54, pp.3292 - 3298, 2007-12 |
| Vertical-Tunnel Field-Effect Transistor Based on a Silicon–MoS2 Three-Dimensional–Two-Dimensional Heterostructure Shin, Gwang Hyuk; Koo, Bondae; Park, Hamin; Woo, Youngjun; Lee, Jae Eun; Choi, Sung-Yool, ACS APPLIED MATERIALS & INTERFACES, v.10, no.46, pp.40212 - 40218, 2018-11 |
Vertical-tunneling field-effect transistor based on MoTe2/MoS2 2D-2D heterojunction Koo, Bondae; Shin, Gwang Hyuk; Park, Hamin; Kim, Hojin; Choi, Sung-Yool, JOURNAL OF PHYSICS D-APPLIED PHYSICS, v.51, no.47, pp.475101, 2018-10 |
| 광화학 기상 증착법을 이용한 이종접합 태양전지의 제작 = Fabrication of heterostructure solar cell using photo-CVD methodlink 강상정; Kang, Sang-Jung; et al, 한국과학기술원, 2008 |
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