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A Comprehensive Study of a Single-Transistor Latch in Vertical Pillar-Type FETs With Asymmetric Source and Drain Lee, Seung-Wook; Kim, Seong-Yeon; Hwang, Kyu-Man; Jin, Ik Kyeong; Hur, Jae; Kim, Dohyun; Son, Jun Woo; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.11, pp.5208 - 5212, 2018-11 |
Optimization of Bias Schemes for Long-Term Endurable 1T-DRAM Through the Use of the Biristor Mode Operation Kim, Dong-Oh; Moon, Dong-Il; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.35, no.2, pp.220 - 222, 2014-02 |
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