Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 981 to 1000 of 51043
| A 1.8-GHz CMOS power amplifier using a dual-primary transformer with improved efficiency in the low power region Park, Changkun; Han, Jeonghu; Kim, Haksun; Hong, Songcheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.56, no.4, pp.782 - 792, 2008-04 |
| A 1.8-GHz CMOS Power Amplifier Using Stacked nMOS and pMOS Structures for High-Voltage Operation Son, Ki-Yong; Park, Chang-Kun; Hong, Song-Cheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.57, no.11, pp.2652 - 2660, 2009-11 |
| A 1.83 GHz 28.5 dBm CMOS Power Up-Mixer Paek, Ji-Seon; Hong, Song-Cheol, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.19, no.6, pp.389 - 391, 2009-06 |
| A 1.8dB NF 112mW single-chip diversity tuner for 2.6GHz S-DMB applications Hwang, M.-W.; Beck, S.; Min, S.; Lee, S.; Yoo, S.; Lim, K.; Jung, H.; et al, 2006 IEEE International Solid-State Circuits Conference, ISSCC, IEEE, 2006-02-06 |
| A 1.9 GHz High Dynamic Range CMOS Power Amplifier 홍성철; 박창근; 김윤석; 한정후; 이동호; 백동현, 실리콘RF집적회로 기술워크샵, pp.438 -, 2005 |
| A 1.9-GHz cmos power amplifier using an interdigitated transmission line transformer Park, Changkun; Baek, Sang-Hyun; Ku, Bon-Hyun; Hong, Songcheol, MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, v.49, no.12, pp.3162 - 3166, 2007-12 |
| A 1.9-GHz CMOS power amplifier using three-port asymmetric transmission line transformer for a polar transmitter Park, Changkun; Kim, Younsuk; Kim, Haksun; Hong, Songcheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.55, no.2, pp.230 - 238, 2007-02 |
| A 1.9-GHz triple-mode class-E power amplifier for a polar transmitter Park, C; Kim, Y; Kim, H; Hong, Songcheol, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.17, no.2, pp.148 - 150, 2007-02 |
| A 1.93 TOPS/W Scalable Deep Learning/Inference Processor with Tetra-parallel MIMD Architecture for Big Data Applications Yoo, Hoi-Jun; Park, Seongwook; Bong, Kyeongryeol; Shin, Dongjoo; Lee, Jinmook; Choi, Sungpill, IEEE International Solid- State Circuits Conference, pp.80 - 81, IEEE, 2015-02-23 |
| A 1.9nJ/pixel Embedded Deep Neural Network Processor for High Speed Visual Attention in a Mobile Vision Recognition SoC Yoo, Hoi Jun; Hong, In Joon; Park, Seong Wook; Park, Jun Young, IEEE Asian Solid-State Circuits Conference(A-SSCC), pp.185 - 188, IEEE, 2015-11-10 |
| A 10 bit gray scale digital-to-analog converter with an interpolating buffer amplifier for AMLCD column drivers Lee, H.-M.; Son, Y.-S.; Jeon, Y.-J.; Jeon, J.-Y.; Lee, G.-H.; Jung, S.-C.; Cho, Gyu-Hyeong, 2007 SID International Symposium, pp.346 - 349, Society for Information Display, 2007-05-23 |
| A 10 bit piecewise linear cascade interpolation dac with loop gain ratio control Lee, Sungwoo; Kim, Kiduk; Park, Kyusung; Park, Changbyung; Lee, Byunghun; Jeon, Jinyong; Jung, Seungchul; et al, 2010 IEEE Custom Integrated Circuits Conference -CICC 2010, IEEE, 2010-09 |
| A 10 bit piecewise linear cascade interpolation DAC with loop gain ratio control Lee, S.; Kim, K.; Park, K.; Park, C.; Lee, B.; Jeon, J.; Huh, J.; et al, 32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010, CICC 2010, 2010-09-19 |
| A 10 Bits Modified VCC Interpolation and DVO Correction by Drain Current Injection Lee, Sungwoo; Kim, Ki-Duk; Park, Kyu-Sung; Park, Chang-Byung; Lee, Byung-Hun; Jeon, Jin-Yong; Jung, Seung-Chul; et al, 2010 SID Symposium, pp.58 - 61, Wiley, 2010-05 |
| A 10 Gb/s Reference-Less Baud-Rate CDR for Low Power Consumption with Direct Feedback Method Kim, Yong-Hun; Lee, Dongil; Lee, Daewoong; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.11, pp.1539 - 1543, 2018-11 |
| A 10 Gbps Optical Receiver Analog Front-End and MZM Driver in 65nm CMOS Qahir, Abdul; Lee, Sang-Gug, IDEC Journal of Integrated Circuits and Systems, v.9, no.2, pp.14 - 19, 2023-04 |
| A 10 nV/rt Hz noise level 32-channel neural impedance sensing ASIC for local activation imaging on nerve section Kim, Jong Pal; Lee, Wonseok; Suh, Junyeub; Lee, Hyungwoo; Lee, Kyuil; Ahn, Ho Young; Seo, Min-Jae; et al, 42nd Annual International Conference of the IEEE-Engineering-in-Medicine-and-Biology-Society (EMBC), pp.4012 - 4015, IEEE, 2020-07 |
| A 10-B 20-MSAMPLE/S LOW-POWER CMOS ADC SONG, WC; Choi, HaeWook; KWAK, SU; SONG, BS, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.30, no.5, pp.514 - 521, 1995-05 |
| A 10-bit 300Msample/s pipelined ADC using time-interleaved SAR ADC for front-end stages Kim, Y.-H.; Lee, J.; Cho, SeongHwan, 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010, pp.4041 - 4044, IEEE, 2010-05-30 |
| A 10-Bit 40-MS/s Pipelined ADC With a Wide Range Operating Temperature for WAVE Applications Oh, Ghilgeun; Lee, Chang-Kyo; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.61, no.1, pp.6 - 10, 2014-01 |
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