Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 1001 to 1020 of 51043
| A 10-bit 50-MS/s pipelined ADC with opamp cuffent reuse Ryu, Seung-Tak; Song, BS; Bacrania, K, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.42, pp.475 - 485, 2007-03 |
| A 10-Bit Column-Driver IC With Parasitic-Insensitive Iterative Charge-Sharing Based Capacitor-String Interpolation for Mobile Active-Matrix LCDs Kim, Hyun Sik; Yang, Jun-Hyeok; Park, Sang Hui; Ryu, Seung-Tak; Cho, Gyu-Hyeong, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.49, no.3, pp.766 - 782, 2014-03 |
| A 10-bit Modified VCC Interpolation and DVO Correction Using Drain-Current Injection Cho, Gyu-Hyeong; Lee, SW; Park, GS; Kim, KD; Park, CB; Lee, BH; Jeon, JY; et al, SID 10 DIGEST, pp.58 - 61, SID 10 DIGEST, 2010-05-28 |
| A 10-bit Serial Integration-Type DAC Architecture for AMLCD Column Drivers Cho, Gyu-Hyeong; Kim, Ki-Duk; Woo, Young-Jin; Lee, Sung-Woo; Jeon, Yong-Joon; Jeon, Jin-Yong; Yang, Jun-Hyeok; et al, SID International Symposium, pp.379 - 382, 2009 |
| A 10-Gb/s 0.71-pJ/bit Forwarded-Clock Receiver Tolerant to High-Frequency Jitter in 65-nm CMOS Chung, Sang-Hye; Kim, Young Ju; Kim, Yonghun; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.63, no.3, pp.264 - 268, 2016-03 |
| A 10-Gb/s CDR with an adaptive optimum loop-bandwidth calibrator for serial communication links Lee, Joon Yeong; Yoon, Jonghyeok; Bae, Hyeon-Min, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.61, no.8, 2014-08 |
| A 10-Phase 270MHz 5000ppm spread spectrum clock generator Lee, W.-Y.; Kim, Lee-Sup, 2008 International SoC Design Conference, ISOCC 2008, 2008-11-24 |
| A 10-uW digital signal processor with adaptive-SNR monitoring for a sub-1V digital hearing aid Yoo, J.; Kim, S.; Cho, N.; Song, S.-J.; Yoo, Hoi-Jun, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.3361 - 3364, 2006-05-21 |
| A 10-µs-tuning MEMS-actuated Gires-Tournois filter for use as a tunable wavelength demultiplexer and a tunable OCDMA encoder/decoder Ebrahimi, Paniz; Kargar, Mahyar; Hauer, Michelle C.; Willner, Alan E.; Yu, Kyoungsik; Solgaard , Olav, OFC(Optical Fiber Communication Conference) , OFC, 2004 |
| A 10.1 '' 183-mu W/electrode, 0.73-mm(2)/sensor High-SNR 3-D Hover Sensor Based on Enhanced Signal Refining and Fine Error Calibrating Techniques Huh, Yeunhee; Hong, Sung-Wan; Park, Sanghui; Shin, Changsik; Bang, Jun-Suk; Park, Changbyung; Park, Sungsoo; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.4, pp.1079 - 1088, 2018-04 |
| A 10.1" 56-channel, 183 uW/electrode, 0.73 mm2/sensor high SNR 3D hover sensor based on enhanced signal refining and fine error calibrating techniques Huh, Yeunhee; Hong, Sung-Wan; Park, Sang-Hui; Bang, Jun-Suk; Park, Changbyung; Park, Sungsoo; Gwon, Hui-Dong; et al, 31st Symposium on VLSI Circuits, pp.C308 - C309, IEEE, 2017-06 |
| A 10.4 mW Electrical Impedance Tomography SoC for Portable Real-Time Lung Ventilation Monitoring System Hong, Sunjoo; Lee, Jaehyuk; Bae, Joonsung; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.11, pp.2501 - 2512, 2015-11 |
| A 10.4 mW Electrical Impedance Tomography SoC for Portable Real-Time Lung Ventilation Monitoring System Yoo, Hoi-Jun; Hong, Sunjoo; Lee, Jaehyuk; Bae, Joonsung, IEEE Asian Solid-State Circuits Conference (A-SSCC), pp.193 - 196, IEEE, 2014-11-12 |
| A 10.8 Gb/s Quarter-Rate 1 FIR 1 IIR Direct DFE with Non-Time-Overlapping Data Generation for 4:1 CMOS Clockless Multiplexer Lee, Daewoong; Lee, Dongil; Kim, Yong-Hun; Jeon, Hyun-Kyu; Kim, Byung-Guk; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.67, no.1, pp.67 - 71, 2020-01 |
| A 10.8 mW Body Channel Communication/MICS Dual-Band Transceiver for a Unified Body Sensor Network Controller Cho, Nam-Jun; Bae, Joon-Sung; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.44, no.12, pp.3459 - 3468, 2009-12 |
| A 10.8mW body-channel-communication/MICS dual-band transceiver for a unified body-sensor-network controller Cho, N.; Bae, J.; Kim, S.; Yoo, Hoi-Jun, 2009 IEEE International Solid-State Circuits Conference ISSCC 2009, 2009-02-08 |
| A 100 MHz-to-1 GHz Fast-Lock Synchronous Clock Generator With DCC for Mobile Applications Kim, Mi-Jo; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.58, no.8, pp.477 - 481, 2011-08 |
| A 100-Channel 1-mW Implantable Neural Recording IC Zou, Xiaodan; Liu, Lei; Cheong, Jia Hao; Yao, Lei; Li, Peng; Cheng, Ming-Yuan; Goh, Wang Ling; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.60, no.10, pp.2584 - 2596, 2013-10 |
| A 100-GbE Reverse Gearbox IC in 40nm CMOS for Supporting Legacy 10-and 40-GbE Standards Yoon, Taehun; Lee, Joon Young; Han, Kwangseok; Lee, Jeongsup; Lee, Sangeun; Kim, Taeho; Won, Hyo Sup; et al, 2015 SYMPOSIUM ON VLSI CIRCUITS, pp.C212 - C213, The Japan Society of Applied Physics, The IEEE Solid-State Circuits Society, 2015-06-18 |
| A 100Mb/s Galvanically-Coupled Body-Channel-Communication Transceiver with 4.75pJ/b TX and 26.8 pJ/b RX for Bionic Arms Jeon, Yeseul; Jung, Chongsoo; Cheon, Song-I; Cho, Hyungjoo; Suh, Ji-Hoon; Jeon, Hyuntak; Koh, Seok-Tae; et al, 33rd Symposium on VLSI Circuits, VLSI Circuits 2019, pp.C292 - C293, Institute of Electrical and Electronics Engineers Inc., 2019-06-13 |
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