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A 159.2mW SoC implementation of T-DMB receiver including stacked memories Lee, J.; Kim, S.; Kim, J.; Kim, D.; Kwon, Y.; Choi, M.; Park, K.; et al, IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, pp.679 - 682, IEEE, 2008-09-21 |
Low latency variable length coding scheme for frame memory recompression Lee, S.; Eum, N.; Chung, M.-K.; Kyung, Chong-Min, 2010 IEEE International Conference on Multimedia and Expo, ICME 2010, pp.232 - 237, IEEE, 2010-07-19 |
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