A 159.2mW SoC implementation of T-DMB receiver including stacked memories

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Publisher
IEEE
Issue Date
2008-09-21
Language
ENG
Citation

IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, pp.679 - 682

ISSN
0886-5930
URI
http://hdl.handle.net/10203/12876
Appears in Collection
EE-Conference Papers(학술회의논문)
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