Nonvolatile Charge-Trap Memory Transistors With Top-Gate Structure Using In-Ga-Zn-O Active Channel and ZnO Charge-Trap Layer

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We proposed a charge-trap-type memory transistor with a top-gate structure composed of Al2O3 blocking/ZnO charge-trap/IGZO active/Al2O3 tunneling layer. The memory ON/OFF ratio higher than six-orders-of magnitude was obtained after the programming when the width and amplitude of program pulses were 100 ms and +/- 20 V, respectively. Excellent endurance was successfully confirmed under the repetitive programming with 10(4) cycles. The memory ON/OFF ratio higher than 10(3) was guaranteed even after the lapse of 10(4) s. Interestingly, the retention properties were affected by the bias conditions for read-out operations.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2014-03
Language
English
Article Type
Article
Citation

IEEE ELECTRON DEVICE LETTERS, v.35, no.3, pp.357 - 359

ISSN
0741-3106
DOI
10.1109/LED.2014.2301800
URI
http://hdl.handle.net/10203/199031
Appears in Collection
MS-Journal Papers(저널논문)
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