Floating bias scheme for long-term endurable 1T-DRAM캐패시터 없는 디램의 작동 내구성 향상을 위한 바이어스 방법에 대한 연구

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The long-term endurance characteristics are investigated for MOSFET-based capacitorless one-transistor DRAM (1T-DRAM) under the conventional versus biristor mode. Based on the experimental results and on a supporting simulation study, it was found that the MOSFET-based 1T-DRAM, when enabled by a biristor mode, is preferred for long-term endurance compared with MOSFET-based 1T-DRAM when operated in a conventional mode. Although a high drain voltage is required in the biristor mode for programming, im-proved endurance characteristics are observed. The simulation study showed that this feature is achieved by the suppression of hot-hole-induced degradation, which arises from the absence of a gate use at the dynamic cell. Thus, this work provides a new type of device architecture as well as a novel and innovative operational method pertaining to conventional 1T-DRAM to mitigate the problem of limited endurance.
Advisors
Choi, Yang-Kyuresearcher최양규
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
2014
Identifier
569215/325007  / 020123074
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 2014.2, [ ii, 39 p. ]

Keywords

Bistable resistor; 바이리스터 모드; 1T-DRAM 모드; 내구성; 1T-DRAM; 바이리스터; biristor; BJT-based capacitorless one-transistor DRAM; disturbance; endurance; 1T-DRAM mode; biristor mode

URI
http://hdl.handle.net/10203/196744
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=569215&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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