A Dual-Power-Mode Output Matching Network for Digitally Modulated CMOS Power Amplifier

Abstract

A dual-power-mode output matching network for a digitally modulated power amplifier (DMPA) to improve low power efficiency is proposed. The DMPA with output matching network is fully integrated using a 0.13-mu m RF CMOS process. The matching network incorporates a switched transformer and capacitors. The switched transformer is proposed for tuning its inductance to have two power modes. It is designed to minimize losses due to parasitic components of the switch transistor. The DMPA has a 12-bit resolution to enable a wide digital transmit power control (TPC) range. The peak power is 29.3 dBm with 34% efficiency. The efficiency at 16 dBm is improved from 8% to 13% by using the output matching network. Simple static predistortion helps the DMPA reconstruct 27.9-dBm WCDMA signals at 1.95 GHz with 31% efficiency. The digital TPC range is 25 dB.