Temperature- and bus traffic- aware data placement in 3D-stacked cache
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, S. | ko |
| dc.contributor.author | Kang, K. | ko |
| dc.contributor.author | Kyung, Chong-Min | ko |
| dc.date.accessioned | 2013-03-28T10:02:03Z | - |
| dc.date.available | 2013-03-28T10:02:03Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2010-09-27 | - |
| dc.identifier.citation | 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010, pp.352 - 357 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/164733 | - |
| dc.language | English | - |
| dc.publisher | IEEE/IFIP | - |
| dc.title | Temperature- and bus traffic- aware data placement in 3D-stacked cache | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000295220400062 | - |
| dc.identifier.scopusid | 2-s2.0-78650940211 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 352 | - |
| dc.citation.endingpage | 357 | - |
| dc.citation.publicationname | 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010 | - |
| dc.identifier.conferencecountry | SP | - |
| dc.identifier.conferencelocation | Madrid | - |
| dc.contributor.localauthor | Kyung, Chong-Min | - |
| dc.contributor.nonIdAuthor | Lee, S. | - |
| dc.contributor.nonIdAuthor | Kang, K. | - |
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