Modeling and measurement of board-level ESD from power/ground plane charged by low-voltage for investigation of decoupling capacitor effects in Printed Circuit Boards (PCBs)
- Publisher
- EPTC 2010
- Issue Date
- 2010-12-08
- Language
- English
- Citation
12th Electronics Packaging Technology Conference, EPTC 2010, pp.773 - 776
- Appears in Collection
- EE-Conference Papers(학술회의논문)
- Files in This Item
- There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.