Minimizing leakage power in sequential circuits by using mixed Vt flip-flops

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Issue Date
2007-11-04
Language
ENG
Citation

2007 IEEE/ACM International Conference on Computer-Aided Design, ICCAD, pp.797 - 802

ISSN
1092-3152
URI
http://hdl.handle.net/10203/154058
Appears in Collection
EE-Conference Papers(학술회의논문)
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