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Integration of Dual Metal Gate/High-K dielectric Stacks for Fermi-Level Pinning FreeIntegration of Dual Metal Gate/High-K dielectric Stacks for Fermi-Level Pinning Free

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Cho, Byung Jinresearcher
Issue Date
2005-06-02
Language
ENG
Citation

The 2nd International Workshop on Nanoscale Semiconductor Devices, pp.253 - 279

URI
http://hdl.handle.net/10203/143322
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EE-Conference Papers(학술회의논문)
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