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Showing results 13661 to 13680 of 109617
| Area and power efficient 10-bit column driver with interpolating DAC and push-pull amplifier for AMLCDs Lee, H.-M.; Son, Y.-S.; Jeon, Y.-J.; Jeon, J.-Y.; Jung, S.-C.; Cho, Gyu-Hyeong, 2008 SID International Symposium, pp.889 - 891, 2008-05-20 |
| Area and power efficient design of coarse time synchronizer and frequency offset estimator for fixed WiMAX systems Kim, T.-H.; Park, In-Cheol, 2008 Asia and South Pacific Design Automation Conference, ASP-DAC, pp.111 - 112, IEEE, 2008-03-21 |
| Area Efficient Algorithms for Upward Straight-Line Tree Drawings Chwa, Kyung Yong, , 1996-01-01 |
| Area efficient neuromorphic circuit based on stochastic computation 윤기원; 최수형; 신영수, 한국반도체학술대회, 대한전자공학회, 2017-02-15 |
| Area efficient neuromorphic circuit based on stochastic computation Yoon, Kiwon; Choi, Suhyeong; Shin, Youngsoo, 13th International SoC Design Conference, ISOCC 2016, pp.73 - 74, Institute of Electrical and Electronics Engineers Inc., 2016-10-23 |
| Area efficient pipelined VLSI implementation of list sphere decoder Lee J.; Park, Sin Chong, 2006 Asia-Pacific Conference on Communications, APCC, 2006-08-31 |
| Area gestures for a laptop computer enabled by a hover-tracking touchpad Choi, Sangwon; Gu, Jiseong; Han, Jaehyun; Lee, Geehyuk, The 10th Asia Pacific Conference on Computer Human Interaction, pp.119 - 124, Human Centered Design Organization and ACM, 2012-08-30 |
| Area Residence Time Modeling in PCS Networks Lee, Ki-Dong; Kim, Sehun, 한국경영과학회/대한산업공학회 '99 춘계공동학술대회, The Korean Operations Research and Management Science Society, 1999 |
| Area, Power, and Latency Considerations of STT-MRAM to Substitute for Main Memory Jin, Y; Shihab, M; Jung, Myoungsoo, MemoryForum, IEEE, 2014-06-14 |
| Area-Contact Haptic Simulation Kim, SY; Park, J; Kwon, Dong-Soo, Proc. Of International Conference on Soft Tissue Modeling and Surgery Simulation, pp.108 - 120, IS4TM'03, 2003-06-12 |
| Area-Efficient and Reusable VLSI Architecture of Decision Feedback Equalizer of QAM Modem Yu, Hyeongseok; Kim, Byung Wook; Cho, Yeon Gon; Cho, Jun Dong; Kim, Jea Woo; Lee, Jae Kon; Park, Hyuncheol; et al, Asia and South Pacific Design Automation Conference (ASP-DAC 2001), IEEE, 2001-01-30 |
| Area-Efficient Architecture for Joint Estimation of Fine Timing and Interger Carrier Frequency Offsets 김태환; 박인철, The 14th Korean Conference on Semiconductors (KCS 2007), 2007 |
| Area-Efficient Digital Baseband Module for Bluetooth Wireless Communications Park, In-Cheol; Shin, MCl; Park, SI; Lee, SW; Kang, SH, 한국반도체학술대회 (KCS), pp.441 - 442, 2002-02 |
| Area-efficient digital baseband module for Bluetooth wireless communications Shin, M.-C.; Park, S.-I.; Lee, S.-W.; Kang, S.-H.; Park, In-Cheol, 2002 IEEE International Symposium on Circuits and Systems, pp.729 - 732, IEEE, 2002-05-26 |
| Area-efficient dynamic thermal management unit using MDLL with shared DLL scheme for many-core processors Paek, S.; Oh, J.; Chung, S.-H.; Kim, Lee-Sup, 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011, pp.1664 - 1667, IEEE, 2011-05-15 |
| Area-Efficient Error Protection for Caches Kim, Soontae, Design Automation and Test in Europe Conference, v.1, pp.1 - 6, 2006-03 |
| Area-efficient memory-based architecture for FFT processing Moon, S.-C.; Park, In-Cheol, Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, v.5, 2003-05-25 |
| Area-Optimized Design of BICMOS Buffers 한철희, 대한전자공학회 하계 종합학술대회, 1990 |
| Area-Selective ALD on 2D Monolayer Lateral Superlattice Template Park, Jeongwon; Kang, Kibum, Advanced Epitaxy for Freestanding Membranes and 2D Materials, AEFM 2022, Massachusetts Institute of Technology, 2022-07-06 |
| ArF line high transmittance attenuuated phase shifting mask 응용을 위한 Cr-Al계 박막연구 노광수, 한국요업학회 추계학술발표대회, 한국요업학회, 1999-01-01 |
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