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Showing results 1 to 4 of 4

1
Fast and Accurate Power Distribution Network Modeling of a Silicon Interposer for 2.5-D/3-D ICs With Multiarray TSVs

Cho, Kyungjun; Kim, Youngwoo; Kim, Subin; Park, Hyunwook; Park, Junyong; Lee, Seongsoo; Shim, Daeyong; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.9, no.9, pp.1835 - 1846, 2019-09

2
Signal Integrity Analysis of Through-Silicon Via (TSV) With a Silicon Dioxide Well to Reduce Leakage Current for High-Bandwidth Memory Interface

Kim, Hyunwoong; Lee, Seonghi; Park, Jongcheol; Shin, Yujun; Woo, Seongho; Kim, Jongwook; Cho, Jaeyong; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.13, no.5, pp.700 - 714, 2023-05

3
Signal Integrity Design and Analysis of Silicon Interposer for GPU-Memory Channels in High-Bandwidth Memory Interface

Cho, Kyungjun; Kim, Youngwoo; Lee, Hyunsuk; Kim, Heegon; Choi, Sumin; Song, Jinwook; Kim, Subin; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.8, no.9, pp.1658 - 1671, 2018-09

4
Transformer Network-Based Reinforcement Learning Method for Power Distribution Network (PDN) Optimization of High Bandwidth Memory (HBM)

Park, Hyunwook; Kim, Minsu; Kim, Seongguk; Kim, Keunwoo; Kim, Haeyeon; Shin, Taein; Son, Keeyoung; et al, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.70, no.11, pp.4772 - 4786, 2022-11

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