Browse by Subject reconfigurable architecture
Showing results 1 to 5 of 5
| A 9.6-mW/Ch 10-MHz Wide-Bandwidth Electrical Impedance Tomography IC With Accurate Phase Compensation for Early Breast Cancer Detection Lee, Jaehyuk; Gweon, Surin; Lee, Kwonjoon; Um, Soyeon; Lee, Kyoung-Rog; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.3, pp.887 - 898, 2021-03 |
| A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications Park, Chanik; Cheon, Wonmoon; Kang, Jeonguk; Roh, Kangho; Cho, Wonhee; Kim, Jin-Soo, ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, v.7, no.4, 2008-07 |
| An Energy-Efficient Speech-Extraction Processor for Robust User Speech Recognition in Mobile Head-Mounted Display Systems Lee, Jinmook; Park, Seongwook; Hong, Injoon; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.64, no.4, pp.457 - 461, 2017-04 |
| Temporal partitioning to amortize reconfiguration overhead for dynamically reconfigurable architectures Kim, Jin-Hwan; Cho, Jeong-Hun; Kim, Tag-Gon, IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E90D, pp.1977 - 1985, 2007-12 |
| Temporal partitioning to amortize reconfiguration overhead for dynamically reconfigurable architectures = 동적 재구성 아키텍처의 재구성 오버헤드를 줄이기 위한 시간적 분할 기법link Kim, Jin-Hwan; 김진환; et al, 한국과학기술원, 2008 |
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