Browse by Subject double-gate

Showing results 1 to 5 of 5

1
A study of negative-bias temperature instability of SOI and body-tied FinFETs

Lee, HJ; Lee, CH; Park, DG; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.26, no.5, pp.326 - 328, 2005-05

2
Low-frequency noise characteristics in p-channel FinFETs

Lee, JS; Choi, Yang-Kyu; Ha, D; King, TJ; Bokor, J, IEEE ELECTRON DEVICE LETTERS, v.23, no.12, pp.722 - 724, 2002-12

3
Nanoscale CMOS spacer FinFET for the terabit era

Choi, Yang-Kyu; King, TJ; Hu, CM, IEEE ELECTRON DEVICE LETTERS, v.23, no.1, pp.25 - 27, 2002-01

4
Photoactive Memory by a Si-Nanowire Field-Effect Transistor

Kim, Chung-Jin; Choi, Sung-Jin; Ahn, Jae-Hyuk; Han, Jin-Woo; Kim, Ho-Yeon; Yoo, Seung-Hyup; Choi, Yang-Kyu, ACS NANO, v.6, no.2, pp.1449 - 1454, 2012-02

5
Sub-60-nm quasi-planar FinFETs fabricated using a simplified process

Lindert, N; Chang, LL; Choi, Yang-Kyu; Anderson, EH; Lee, WC; King, TJ; Bokor, J; et al, IEEE ELECTRON DEVICE LETTERS, v.22, no.10, pp.487 - 489, 2001-10

rss_1.0 rss_2.0 atom_1.0