Electrical-Stress-Induced Threshold Voltage Instability in Solution-Processed ZnO Thin-Film Transistors: An Experimental and Simulation Study

Abstract

In this paper, we present the experimental and simulation results of the stress-recovery characteristics of solution-processed ZnO thin-film transistors under gate bias and current stress conditions. Under both stress conditions, we invariably observed a positive threshold voltage shift (Delta V(T)) that is initially associated with changes in the values of subthreshold slope and off-current, which later becomes constant on prolonging the stress time. However, Delta V(T) was less for current stress, compared with gate bias stress. This stress-induced Delta V(T) is speculated to be caused by defect creation in the active layer and charge trapping at the semiconductor-dielectric interface. Following a stretched exponential model, at room temperature, a characteristics time of 1.6 x 10(3) -3.6 x 10(3) s during stress and 7.7 x 10(3) -15.7 x 10(3) s during recovery was obtained under all gate bias and current stress conditions. The Delta V(T)-time measurements performed under various temperatures yield an activation energy of similar to 0.5 and similar to 0.7 eV for the stress and recovery periods, respectively. The device simulation indicates that Delta V(T) is mainly caused by the increase in acceptorlike defects of the density of states in the ZnO channel layer. Furthermore, it was found that the deep lying states are responsible for the change in the value of inverse subthreshold slope.