A Piecewise Linear 10 Bit DAC Architecture With Drain Current Modulation for Compact LCD Driver ICs

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A piecewise linear 10 bit DAC for LCD data driver with robust interpolation method of drain current modulation is presented. It has higher effective bit resolution than the linear 10 bit switched-capacitor DAC when applied to nonlinear liquid crystal characteristics. By adopting a simultaneous design flow based on the estimations for the mismatch and nonlinearity effects on channel driver performance, the proposed DAC accomplishes good DNL of 0.37 LSB and excellent channel uniformity such that the mean and the standard deviation of the maximum output voltage deviations are 6.35 mV and 0.54 mV, respectively. The data driver with the new interpolation shows 8.2% shrinkage of chip area in comparison with the conventional 8 bit data driver with R-DAC.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2009-12
Language
English
Article Type
Article; Proceedings Paper
Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.44, no.12, pp.3659 - 3675

ISSN
0018-9200
URI
http://hdl.handle.net/10203/98864
Appears in Collection
EE-Journal Papers(저널논문)
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