Partial bus-invert coding for power optimization of application-specific systems

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dc.contributor.authorShin, Youngsooko
dc.contributor.authorChae, SIko
dc.contributor.authorChoi, Kko
dc.date.accessioned2007-08-07T06:31:37Z-
dc.date.available2007-08-07T06:31:37Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2001-04-
dc.identifier.citationIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.9, no.2, pp.377 - 383-
dc.identifier.issn1063-8210-
dc.identifier.urihttp://hdl.handle.net/10203/979-
dc.description.abstractThis paper presents two bus coding schemes for power optimization of application-specific systems: Partial Bus-invert coding and its extension to Multiway Partial Bus-invert coding. In the first scheme, only a selected subgroup of bus lines is encoded to avoid unnecessary inversion of relatively inactive and/or uncorrelated bus lines which are not included in the subgroup. In the extended scheme, we partition a bus into multiple subbuses by clustering highly correlated bus lines and then encode each subbus independently. We describe a heuristic algorithm of partitioning a bus into subbuses for each encoding scheme. Experimental results for various examples indicate that both encoding schemes are highly efficient for application-specific systems.-
dc.description.sponsorshipThis work was supported in part by the Korea Research Foundation under a Nondirected Research Fund.en
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectADDRESS-
dc.titlePartial bus-invert coding for power optimization of application-specific systems-
dc.typeArticle-
dc.identifier.wosid000169035300013-
dc.identifier.scopusid2-s2.0-0035301452-
dc.type.rimsART-
dc.citation.volume9-
dc.citation.issue2-
dc.citation.beginningpage377-
dc.citation.endingpage383-
dc.citation.publicationnameIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorShin, Youngsoo-
dc.contributor.nonIdAuthorChae, SI-
dc.contributor.nonIdAuthorChoi, K-
dc.type.journalArticleArticle-
dc.subject.keywordAuthordigital complementary metal-oxide-semiconductor (CMOS-
dc.subject.keywordAuthorlow-power dissipation-
dc.subject.keywordAuthormemory-
dc.subject.keywordAuthorswitching activity-
dc.subject.keywordAuthorsystem level-
dc.subject.keywordAuthortradeoffs-
dc.subject.keywordPlusADDRESS-
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