A Nonpiecewise Model for Long-Channel Junctionless Cylindrical Nanowire FETs
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Duarte, Juan P | ko |
| dc.contributor.author | Choi, Sung-Jin | ko |
| dc.contributor.author | Moon, Dong-Il | ko |
| dc.contributor.author | Choi, Yang-Kyu | ko |
| dc.date.accessioned | 2013-03-09T21:07:32Z | - |
| dc.date.available | 2013-03-09T21:07:32Z | - |
| dc.date.created | 2012-04-06 | - |
| dc.date.created | 2012-04-06 | - |
| dc.date.issued | 2012-02 | - |
| dc.identifier.citation | IEEE ELECTRON DEVICE LETTERS, v.33, no.2, pp.155 - 157 | - |
| dc.identifier.issn | 0741-3106 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/97463 | - |
| dc.description.abstract | A nonpiecewise drain current model is formulated for long-channel junctionless (JL) cylindrical nanowire (CN) FETs. It is obtained by using the Pao-Sah integral and a continuous charge model, which is derived by extending the parabolic potential approximation in all regions of the device operation. The proposed nonpiecewise model analytically describes the bulk and surface current mechanisms in JL CN FETs from the subthreshold region through the linear region to the saturation region without any fitting parameters. In addition, for each of these operation regions, the model reduces to simple expressions that explain the working principle of JL CN FETs. The model is compared with numerical simulations and shows good agreement. | - |
| dc.language | English | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.subject | SURROUNDING-GATE MOSFETS | - |
| dc.subject | TRANSISTORS | - |
| dc.title | A Nonpiecewise Model for Long-Channel Junctionless Cylindrical Nanowire FETs | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000299812300009 | - |
| dc.identifier.scopusid | 2-s2.0-84856252340 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 33 | - |
| dc.citation.issue | 2 | - |
| dc.citation.beginningpage | 155 | - |
| dc.citation.endingpage | 157 | - |
| dc.citation.publicationname | IEEE ELECTRON DEVICE LETTERS | - |
| dc.identifier.doi | 10.1109/LED.2011.2174770 | - |
| dc.embargo.liftdate | 9999-12-31 | - |
| dc.embargo.terms | 9999-12-31 | - |
| dc.contributor.localauthor | Choi, Yang-Kyu | - |
| dc.type.journalArticle | Article | - |
| dc.subject.keywordAuthor | Bulk current | - |
| dc.subject.keywordAuthor | compact model | - |
| dc.subject.keywordAuthor | cylindrical nanowire (NW) FET | - |
| dc.subject.keywordAuthor | junctionless (JL) transistor | - |
| dc.subject.keywordAuthor | semiconductor device modeling | - |
| dc.subject.keywordAuthor | surface current | - |
| dc.subject.keywordPlus | SURROUNDING-GATE MOSFETS | - |
| dc.subject.keywordPlus | TRANSISTORS | - |
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