DC Field | Value | Language |
---|---|---|
dc.contributor.author | Song, Eak-Hwan | ko |
dc.contributor.author | Cho, Jeong-Hyeon | ko |
dc.contributor.author | Kim, Joung-Ho | ko |
dc.contributor.author | Shim, Yu-Jeong | ko |
dc.contributor.author | Kim, Ga-Won | ko |
dc.date.accessioned | 2013-03-09T18:11:31Z | - |
dc.date.available | 2013-03-09T18:11:31Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2010-05 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.52, pp.410 - 420 | - |
dc.identifier.issn | 0018-9375 | - |
dc.identifier.uri | http://hdl.handle.net/10203/97093 | - |
dc.description.abstract | We propose a closed-form analytic model for the newly presented passive equalizer using near-end crosstalk and reflections on printed circuit board (PCB). The proposed model is developed by using impulse response analysis and the Fourier transform. Based on the model, we propose a design-optimization procedure for the passive equalizer, which achieves eye-opening maximization and ISI minimization in order to maximize the equalization performance and reduce the design cycle. In the proposed optimization procedure, the eye-opening is maximized with a parameter sweep and peak distortion analysis, and the ISI is minimized by the proposed negative ISI cancellation technique. The proposed model and the design-optimization procedure are demonstrated experimentally for a data rate of 16 Gb/s on a 40-cm-long backplane PCB, and they achieve wideband equalization with a significant improvement in the voltage and timing margins of the received serial data. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | PRINTED-CIRCUIT BOARDS | - |
dc.subject | TIME-DOMAIN | - |
dc.title | Modeling and Design Optimization of a Wideband Passive Equalizer on PCB Based on Near-End Crosstalk and Reflections for High-Speed Serial Data Transmission | - |
dc.type | Article | - |
dc.identifier.wosid | 000277881800016 | - |
dc.identifier.scopusid | 2-s2.0-77952744301 | - |
dc.type.rims | ART | - |
dc.citation.volume | 52 | - |
dc.citation.beginningpage | 410 | - |
dc.citation.endingpage | 420 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY | - |
dc.identifier.doi | 10.1109/TEMC.2010.2042452 | - |
dc.contributor.localauthor | Kim, Joung-Ho | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Design optimization | - |
dc.subject.keywordAuthor | equalizer modeling | - |
dc.subject.keywordAuthor | frequency-dependent loss | - |
dc.subject.keywordAuthor | impulse response analysis | - |
dc.subject.keywordAuthor | ISI | - |
dc.subject.keywordAuthor | ISI cancellation | - |
dc.subject.keywordAuthor | near-end crosstalk (NEXT) | - |
dc.subject.keywordAuthor | passive equalizer | - |
dc.subject.keywordAuthor | wideband equalizer | - |
dc.subject.keywordPlus | PRINTED-CIRCUIT BOARDS | - |
dc.subject.keywordPlus | TIME-DOMAIN | - |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.