DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, Pyoung-Won | ko |
dc.contributor.author | Park, Dong-Min | ko |
dc.contributor.author | Cho, Seong-Hwan | ko |
dc.date.accessioned | 2013-03-09T12:25:53Z | - |
dc.date.available | 2013-03-09T12:25:53Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2010-01 | - |
dc.identifier.citation | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.20, pp.52 - 54 | - |
dc.identifier.issn | 1531-1309 | - |
dc.identifier.uri | http://hdl.handle.net/10203/96338 | - |
dc.description.abstract | In this letter, a fractional-N frequency synthesizer based on an offset phase-locked loop (OPLL) architecture is presented. The proposed synthesizer achieves low-noise as the two low-pass filters that are inherent in the OPLL highly suppresses the quantization noise from the delta-sigma modulator. In addition, it consumes low power by employing charge-recycling technique in the sub-PLL. A prototype synthesizer implemented in 0.13 mu m CMOS process achieves 9 dB of noise reduction compared to a conventional PLL while consuming 3.2 mW of power. | - |
dc.language | English | - |
dc.publisher | IEEE | - |
dc.subject | TRANSMITTER | - |
dc.subject | PLL | - |
dc.title | A Low-Noise and Low-Power Frequency Synthesizer Using Offset Phase-Locked Loop in 0.13-mu m CMOS | - |
dc.type | Article | - |
dc.identifier.wosid | 000273566500018 | - |
dc.identifier.scopusid | 2-s2.0-75149137298 | - |
dc.type.rims | ART | - |
dc.citation.volume | 20 | - |
dc.citation.beginningpage | 52 | - |
dc.citation.endingpage | 54 | - |
dc.citation.publicationname | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | - |
dc.identifier.doi | 10.1109/LMWC.2009.2035967 | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Cho, Seong-Hwan | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Frequency synthesizer | - |
dc.subject.keywordAuthor | low-noise | - |
dc.subject.keywordAuthor | low-power | - |
dc.subject.keywordAuthor | offset phase-locked loop | - |
dc.subject.keywordPlus | TRANSMITTER | - |
dc.subject.keywordPlus | PLL | - |
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