Gate controlled magnetoresistance in a silicon metal-oxide-semiconductor field-effect-transistor

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We present a study of the magnetoresistance (MR) of a Si metal-oxide-semiconductor field-effect-transistor (MOSFET) at the break-down regime when a magnetic field is applied perpendicular to the plane of the device. We have identified two different regimes where we observe a large and gate-voltage dependent MR. We suggest two different mechanisms which can explain the observed high MR. Moreover, we have studied how the MR of the MOSFET scales with the dimensions of the channel for gate voltages below the threshold. We observed a decrease in the MR by two orders of magnitude by reducing the dimensions of the channel from 50x280 mu m(2) to 5x5 mu m(2). (C) 2010 American Institute of Physics. [doi: 10.1063/1.3475771]
Publisher
AMER INST PHYSICS
Issue Date
2010-08
Language
English
Article Type
Article
Keywords

CHARGE-LIMITED CURRENTS

Citation

APPLIED PHYSICS LETTERS, v.97, no.8

ISSN
0003-6951
DOI
10.1063/1.3475771
URI
http://hdl.handle.net/10203/94668
Appears in Collection
MS-Journal Papers(저널논문)
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