Yield-Ensuring DAC-Embedded Opamp Design Based on Accurate Behavioral Model Development

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dc.contributor.authorJang, YSko
dc.contributor.authorNguyen, HNko
dc.contributor.authorRyu, Seung-Takko
dc.contributor.authorLee, Sang-Gugko
dc.date.accessioned2013-03-08T18:14:14Z-
dc.date.available2013-03-08T18:14:14Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2010-06-
dc.identifier.citationIEICE TRANSACTIONS ON ELECTRONICS, v.E93C, pp.935 - 937-
dc.identifier.issn0916-8524-
dc.identifier.urihttp://hdl.handle.net/10203/93865-
dc.description.abstractAn accurate behavioral model of a DAC-embedded opamp (DAC-opamp) is developed for a yield-ensuring LCD column driver design. A lookup table for the V-I curve of the unit differential pair in the DAC-opamp is extracted from a circuit simulation and is later manipulated through a random error insertion. Virtual ground assumption simplifies the output voltage estimation algorithm. The developed behavioral model of a 5-bit DAC-opamp shows good agreement with the circuit level simulation with less than 5% INL difference.-
dc.languageEnglish-
dc.publisherIEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG-
dc.titleYield-Ensuring DAC-Embedded Opamp Design Based on Accurate Behavioral Model Development-
dc.typeArticle-
dc.identifier.wosid000279250900031-
dc.identifier.scopusid2-s2.0-77952985771-
dc.type.rimsART-
dc.citation.volumeE93C-
dc.citation.beginningpage935-
dc.citation.endingpage937-
dc.citation.publicationnameIEICE TRANSACTIONS ON ELECTRONICS-
dc.identifier.doi10.1587/transele.E93.C.935-
dc.contributor.localauthorRyu, Seung-Tak-
dc.contributor.localauthorLee, Sang-Gug-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorDAC-
dc.subject.keywordAuthorDAC-embedded-
dc.subject.keywordAuthorbehavioral model-
dc.subject.keywordAuthoryield-
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EE-Journal Papers(저널논문)
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