A Low-Parasitic and Common-Centroid Cross-Coupled CMOS Transistor Structure for High-Frequency VCO Design

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dc.contributor.authorLee, In-Youngko
dc.contributor.authorYun, Seok-Juko
dc.contributor.authorOh, Seung-Minko
dc.contributor.authorLee, SGko
dc.contributor.authorYun, SJko
dc.contributor.authorLee, Sang-Gugko
dc.date.accessioned2013-03-08T15:19:44Z-
dc.date.available2013-03-08T15:19:44Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2009-05-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.30, pp.532 - 534-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/93386-
dc.description.abstractThis letter reports a cross-coupled transistor structure that allows simple routing, induces no gate-drain overlap interconnect capacitances, minimizes the parasitic resistances of interconnects, allows smaller drain-junction parasitic capacitances, and provides inherent common-centroid characteristic, all of which help to improve the high-frequency and wideband performances of CMOS voltage-controlled oscillators (VCOs). The proposed cross-coupled transistor structure is applied for a 26.2-GRZ differential VCO design which dissipates 7.3 mA from 1.8-V supply using 0.18-mu m CMOS. Measurements show 2.1-GHz, 29%, and 4-dB improvements in operating frequency, tuning range, and phase noise compared to those of the VCO using a conventional cross-coupled transistor layout, respectively. The VCO with the proposed transistor structure shows the phase noise of -113.7 dBc/Hz at 1 MHz, which corresponds to F O M and F O M(T) of -190.4 and -194 dBc/Hz, respectively.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectPHASE-NOISE IMPROVEMENT-
dc.subjectTECHNOLOGY-
dc.subjectOSCILLATORS-
dc.titleA Low-Parasitic and Common-Centroid Cross-Coupled CMOS Transistor Structure for High-Frequency VCO Design-
dc.typeArticle-
dc.identifier.wosid000265711700036-
dc.identifier.scopusid2-s2.0-67349176207-
dc.type.rimsART-
dc.citation.volume30-
dc.citation.beginningpage532-
dc.citation.endingpage534-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2009.2015472-
dc.contributor.localauthorLee, Sang-Gug-
dc.contributor.nonIdAuthorOh, Seung-Min-
dc.contributor.nonIdAuthorLee, SG-
dc.contributor.nonIdAuthorYun, SJ-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorCMOS-
dc.subject.keywordAuthorcommon-centroid-
dc.subject.keywordAuthorcross-coupled transistor layout-
dc.subject.keywordAuthorgain cell layout-
dc.subject.keywordAuthorlow parasitic-
dc.subject.keywordAuthorvoltage-controlled oscillator (VCO)-
dc.subject.keywordPlusPHASE-NOISE IMPROVEMENT-
dc.subject.keywordPlusTECHNOLOGY-
dc.subject.keywordPlusOSCILLATORS-
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