This letter presents a charge-recycling VCO and divider in 0.18 mu m CMOS technology. The power consumption of the proposed circuit is significantly reduced by stacking the low-voltage divider on the top of the low-voltage VCO, and hence, the VCO reuses the current from the divider. To enhance the reliability of the proposed circuit under supply voltage variation, transistor sharing and adaptive body-biasing techniques are employed. It allows the proposed circuit to operate down to 1.45 V of supply voltage without degrading the FoM. Experimental results show that the proposed circuit achieves 900 mu W of power consumption and -184 dBc/Hz of FoM at 1.8 V.