Physical origin of threshold voltage problems in polycrystalline silicon/HfO2 gate stacks

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dc.contributor.authorKim, DYko
dc.contributor.authorKang, JGko
dc.contributor.authorChang, Kee-Jooko
dc.date.accessioned2013-03-08T03:14:04Z-
dc.date.available2013-03-08T03:14:04Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2006-04-
dc.identifier.citationAPPLIED PHYSICS LETTERS, v.88, no.16, pp.162107 - 162107-
dc.identifier.issn0003-6951-
dc.identifier.urihttp://hdl.handle.net/10203/91961-
dc.description.abstractBased on theoretical calculations, we find that at p+ polycrystalline silicon (poly-Si)/HfO2 gates, Si interstitials are easily migrated from the electrode, forming Hf-Si bonds with a charge transfer to the electrode, and the resulting interface dipole raises the Fermi level of poly-Si toward the pinning level, causing high flat band voltage shifts. In O-rich grown HfO2 on Si substrates, the Si atoms substitute for the Hf sites, leading to the formation of Hf-silicate layers, while under O-poor conditions, they remain as interstitial defects, binding with the Hf atoms, and behave as a negative-U trap, which causes the threshold voltage instability. (c) 2006 American Institute of Physics.-
dc.languageEnglish-
dc.publisherAMER INST PHYSICS-
dc.titlePhysical origin of threshold voltage problems in polycrystalline silicon/HfO2 gate stacks-
dc.typeArticle-
dc.identifier.wosid000236969300055-
dc.identifier.scopusid2-s2.0-33646172195-
dc.type.rimsART-
dc.citation.volume88-
dc.citation.issue16-
dc.citation.beginningpage162107-
dc.citation.endingpage162107-
dc.citation.publicationnameAPPLIED PHYSICS LETTERS-
dc.identifier.doi10.1063/1.2193054-
dc.contributor.localauthorChang, Kee-Joo-
dc.contributor.nonIdAuthorKim, DY-
dc.contributor.nonIdAuthorKang, JG-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordPlusOXIDE INTERFACE-
dc.subject.keywordPlusHFO2-
dc.subject.keywordPlusEFFICIENT-
dc.subject.keywordPlusSIO2-
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