DC Field | Value | Language |
---|---|---|
dc.contributor.author | Seong, B | ko |
dc.contributor.author | Kim, Dong-Gook | ko |
dc.contributor.author | Roh, Y | ko |
dc.contributor.author | Park, Kyu-Ho | ko |
dc.contributor.author | Park, Dae-Yeon | ko |
dc.date.accessioned | 2013-03-04T19:07:05Z | - |
dc.date.available | 2013-03-04T19:07:05Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2004-07 | - |
dc.identifier.citation | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E87D, pp.1682 - 1692 | - |
dc.identifier.issn | 0916-8532 | - |
dc.identifier.uri | http://hdl.handle.net/10203/83759 | - |
dc.description.abstract | Shared memory multiprocessors in which each processor has its own TLB must manage consistency among TLBs and a page table. As the large-scale CC-NUMA (cache-coherent non-uniform memory access) shared memory multiprocessors become popular, it is important for TLB consistency management algorithms to be highly scalable. In this paper, we propose a TLB update-hint algorithm as a scalable TLB consistency management solution for CC-NUMA multiprocessors. By using a lazy TLB invalidation approach, we reduced the number of unnecessary processor interruptions and idle-waiting time, and achieved a high level of scalability. Using a shared memory simulator, we evaluated the TLB update-hint algorithm. For performance comparison, we also simulated the TLB shootdown algorithm, one of the most popular TLB consistency algorithms. The simulations demonstrated that the TLB update-hint algorithm scales well in systems with a large number of processors. At 64 node systems, the TLB update-hint algorithm shows 47similar to87% better performance than the TLB shootdown algorithm. | - |
dc.language | English | - |
dc.publisher | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG | - |
dc.subject | VIRTUAL-ADDRESS CACHES | - |
dc.title | TLB update-hint: A scalable TLB consistency algorithm for cache-coherent non-uniform memory access multiprocessors | - |
dc.type | Article | - |
dc.identifier.wosid | 000222585200010 | - |
dc.identifier.scopusid | 2-s2.0-3142782790 | - |
dc.type.rims | ART | - |
dc.citation.volume | E87D | - |
dc.citation.beginningpage | 1682 | - |
dc.citation.endingpage | 1692 | - |
dc.citation.publicationname | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS | - |
dc.contributor.localauthor | Park, Kyu-Ho | - |
dc.contributor.localauthor | Park, Dae-Yeon | - |
dc.contributor.nonIdAuthor | Seong, B | - |
dc.contributor.nonIdAuthor | Roh, Y | - |
dc.type.journalArticle | Article; Proceedings Paper | - |
dc.subject.keywordAuthor | TLB consistency | - |
dc.subject.keywordAuthor | TLB shootdown | - |
dc.subject.keywordAuthor | cache-coherent non-unifrom memory access | - |
dc.subject.keywordAuthor | shared memory multiprocessor operating system | - |
dc.subject.keywordPlus | VIRTUAL-ADDRESS CACHES | - |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.