Low power fully differential frequency doubler

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dc.contributor.authorYang, MSko
dc.contributor.authorOh, SMko
dc.contributor.authorLee, Sang-Gugko
dc.date.accessioned2013-03-04T09:17:21Z-
dc.date.available2013-03-04T09:17:21Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2003-09-
dc.identifier.citationELECTRONICS LETTERS, v.39, pp.1388 - 1389-
dc.identifier.issn0013-5194-
dc.identifier.urihttp://hdl.handle.net/10203/82291-
dc.description.abstractA novel fully differential frequency doubler is proposed based on CMOS technology, where a stacked push-push configuration is used to generate differential output. Compared to previously reported doublers, the proposed topology has advantages in power dissipation, fundamental frequency rejection, and simplicity. By utilising the proposed doubler, a low power direct-conversion up-mixer is designed for 900 MHz applications. The fabricated up-mixer shows 5.5 dB of power conversion gain and 7.5 dBm of output IP3, while dissipating total current of 4.5 mA from 1.25 V supply.-
dc.languageEnglish-
dc.publisherINST ENGINEERING TECHNOLOGY-IET-
dc.titleLow power fully differential frequency doubler-
dc.typeArticle-
dc.identifier.wosid000185849800017-
dc.identifier.scopusid2-s2.0-0141939057-
dc.type.rimsART-
dc.citation.volume39-
dc.citation.beginningpage1388-
dc.citation.endingpage1389-
dc.citation.publicationnameELECTRONICS LETTERS-
dc.contributor.localauthorLee, Sang-Gug-
dc.contributor.nonIdAuthorYang, MS-
dc.contributor.nonIdAuthorOh, SM-
dc.type.journalArticleArticle-
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