DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, H | ko |
dc.contributor.author | Chung, HJ | ko |
dc.contributor.author | Lee, Jhinhwan | ko |
dc.contributor.author | Lee, SJ | ko |
dc.contributor.author | Choi, BY | ko |
dc.contributor.author | Song, YJ | ko |
dc.contributor.author | Kuk, Y | ko |
dc.date.accessioned | 2013-03-03T21:25:09Z | - |
dc.date.available | 2013-03-03T21:25:09Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2003-07 | - |
dc.identifier.citation | JAPANESE JOURNAL OF APPLIED PHYSICS, v.42, pp.4780 - 4782 | - |
dc.identifier.issn | 0021-4922 | - |
dc.identifier.uri | http://hdl.handle.net/10203/80509 | - |
dc.description.abstract | Many device scientists believe that current Ultra Large Scale Integration (ULSI) technology will face technical and economic difficulties in further miniaturization. It has been proposed that 1-dimensional (I-D) transistors with connecting wires and three-dimensionally stacked structures-may replace current field effect transistors with planar integration structures. We propose a new scheme to fabricate and integrate I-D active devices. As a first step, we show the way to form I-D wires with spatially variable electronic structures and the way to characterize them. | - |
dc.language | English | - |
dc.publisher | INST PURE APPLIED PHYSICS | - |
dc.subject | NANOWIRE BUILDING-BLOCKS | - |
dc.subject | CARBON NANOTUBES | - |
dc.subject | LOGIC GATES | - |
dc.subject | METALLOFULLERENES | - |
dc.subject | ELECTRONICS | - |
dc.subject | TRANSISTOR | - |
dc.subject | GROWTH | - |
dc.title | Functionalized one-dimensional wires and their interconnections | - |
dc.type | Article | - |
dc.identifier.wosid | 000184780100044 | - |
dc.identifier.scopusid | 2-s2.0-0141680631 | - |
dc.type.rims | ART | - |
dc.citation.volume | 42 | - |
dc.citation.beginningpage | 4780 | - |
dc.citation.endingpage | 4782 | - |
dc.citation.publicationname | JAPANESE JOURNAL OF APPLIED PHYSICS | - |
dc.identifier.doi | 10.1143/JJAP.42.4780 | - |
dc.contributor.localauthor | Lee, Jhinhwan | - |
dc.contributor.nonIdAuthor | Kim, H | - |
dc.contributor.nonIdAuthor | Chung, HJ | - |
dc.contributor.nonIdAuthor | Lee, SJ | - |
dc.contributor.nonIdAuthor | Choi, BY | - |
dc.contributor.nonIdAuthor | Song, YJ | - |
dc.contributor.nonIdAuthor | Kuk, Y | - |
dc.type.journalArticle | Article; Proceedings Paper | - |
dc.subject.keywordAuthor | scanning tunneling microscope | - |
dc.subject.keywordAuthor | one-dimensional functional devices | - |
dc.subject.keywordAuthor | interconnections | - |
dc.subject.keywordPlus | NANOWIRE BUILDING-BLOCKS | - |
dc.subject.keywordPlus | CARBON NANOTUBES | - |
dc.subject.keywordPlus | LOGIC GATES | - |
dc.subject.keywordPlus | METALLOFULLERENES | - |
dc.subject.keywordPlus | ELECTRONICS | - |
dc.subject.keywordPlus | TRANSISTOR | - |
dc.subject.keywordPlus | GROWTH | - |
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