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Showing results 1 to 4 of 4

1
Common Counters: Compressed Encryption Counters for Secure GPU Memory

Na, Seonjin; Lee, Sunho; Kim, Yeonjae; Park, Jongse; Huh, Jaehyuk, The 27th IEEE International Symposium on High-Performance Computer Architecture (HPCA-27), pp.1 - 13, IEEE Computer Society, 2021-02-27

2
Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training

Kim, Jungwoo; Na, Seonjin; Lee, SangHyeon; Lee, Sunho; Huh, Jaehyuk, IEEE/ACM International Symposium on Microarchitecture, IEEE/ACM, 2023-10-30

3
TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit

Lee, Sunho; Kim, Jungwoo; Na, Seonjin; Park, Jongse; Huh, Jaehyuk, 28th Annual IEEE International Symposium on High-Performance Computer Architecture (HPCA), pp.229 - 243, IEEE COMPUTER SOC, 2022-04-04

4
Tunable Memory Protection for Secure Neural Processing Units

Lee, Sunho; Na, Seonjin; Kim, Jungwoo; PARK, JONGSE; Huh, Jaehyuk, The 40th IEEE International Conference on Computer Design, ICCD 2022, pp.105 - 108, IEEE, 2022-10-24

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