An analytical model for the effect of graded gate oxide on the channel electric field in MOSFETs with lightly doped drain structure

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dc.contributor.authorKim, JSko
dc.contributor.authorSeo, KSko
dc.contributor.authorYoo, Hoi-Junko
dc.date.accessioned2013-03-02T20:54:42Z-
dc.date.available2013-03-02T20:54:42Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1997-04-
dc.identifier.citationSOLID-STATE ELECTRONICS, v.41, no.4, pp.650 - 654-
dc.identifier.issn0038-1101-
dc.identifier.urihttp://hdl.handle.net/10203/75478-
dc.description.abstractA quasi-two-dimensional analytical model is developed to analyze the effect of process dependent Graded Gate Oxide (GGO) on the channel electric field in the drain region of an LDD (Lightly Doped Drain) MOSFET. The model takes GGO shape dependence, such as linear and parabolic shape, into consideration and the electric field profile obtained from the analysis shows that the maximum channel electric field (E(max)) is varied with GGO length and GGO thickness. E(max) increases as the GGO thickness increases for relatively long GGO length, but for short GGO length, the contradictory phenomenon is observed. The dependence of the optimum LDD doping concentration for the minimum E(max) on the GGO length and GGO thickness is also investigated. With the same GGO dimensions, the dry reoxidation is less effective because of its linear shape of GGO, but has almost the same E(max) if it has the optimum LDD doping concentration. It is found that a GGO-LDD MOSFET must have short GGO length and thick GGO thickness as well as optimum LDD doping concentration in order to minimize the hot carrier induced degradation. (C) 1997 Elsevier Science Ltd.-
dc.languageEnglish-
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD-
dc.subjectSIDEWALL OXIDATION-
dc.subjectDEGRADATION-
dc.subjectDESIGN-
dc.titleAn analytical model for the effect of graded gate oxide on the channel electric field in MOSFETs with lightly doped drain structure-
dc.typeArticle-
dc.identifier.wosidA1997WT06200022-
dc.identifier.scopusid2-s2.0-0031119318-
dc.type.rimsART-
dc.citation.volume41-
dc.citation.issue4-
dc.citation.beginningpage650-
dc.citation.endingpage654-
dc.citation.publicationnameSOLID-STATE ELECTRONICS-
dc.identifier.doi10.1016/S0038-1101(97)83322-9-
dc.contributor.localauthorYoo, Hoi-Jun-
dc.contributor.nonIdAuthorKim, JS-
dc.contributor.nonIdAuthorSeo, KS-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordPlusSIDEWALL OXIDATION-
dc.subject.keywordPlusDEGRADATION-
dc.subject.keywordPlusDESIGN-
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