Design of high efficiency interleaved active clamp zero voltage switching forward converter
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Moon, GunWoo | ko |
| dc.date.accessioned | 2013-03-02T18:36:11Z | - |
| dc.date.available | 2013-03-02T18:36:11Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1999-07 | - |
| dc.identifier.citation | INTERNATIONAL JOURNAL OF ELECTRONICS, v.86, no.7, pp.875 - 889 | - |
| dc.identifier.issn | 0020-7217 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/74936 | - |
| dc.description.abstract | A high efficiency interleaved active clamp forward converter with self-driven synchronous rectifiers for a modular power processor is presented. To simplify the gate drive circuits, the n-p MOSFETs coupled active clamp method is used. An efficiency of about 90% for a load range of 50-100% is achieved. Details of design for the power stage and current mode control circuit are provided, and also some experimental results are given. | - |
| dc.language | English | - |
| dc.publisher | TAYLOR FRANCIS LTD | - |
| dc.subject | SYNCHRONOUS RECTIFICATION | - |
| dc.title | Design of high efficiency interleaved active clamp zero voltage switching forward converter | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000080747900007 | - |
| dc.identifier.scopusid | 2-s2.0-0346499679 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 86 | - |
| dc.citation.issue | 7 | - |
| dc.citation.beginningpage | 875 | - |
| dc.citation.endingpage | 889 | - |
| dc.citation.publicationname | INTERNATIONAL JOURNAL OF ELECTRONICS | - |
| dc.identifier.doi | 10.1080/002072199133094 | - |
| dc.contributor.localauthor | Moon, GunWoo | - |
| dc.type.journalArticle | Article | - |
| dc.subject.keywordPlus | SYNCHRONOUS RECTIFICATION | - |
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