A Low Voltage High Speed Self-Timed CMOS Logic for the Multi-giga Bit Synchronous DRAM Application
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Yoo, Hoi-Jun | ko |
| dc.date.accessioned | 2013-03-02T16:11:55Z | - |
| dc.date.available | 2013-03-02T16:11:55Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1997-01 | - |
| dc.identifier.citation | IEICE TRANSACTIONS ON ELECTRONICS, v.0, no.8, pp.0 - 0 | - |
| dc.identifier.issn | 0916-8524 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/74360 | - |
| dc.language | English | - |
| dc.publisher | IEICE-Inst Electronics Information Communications Eng | - |
| dc.title | A Low Voltage High Speed Self-Timed CMOS Logic for the Multi-giga Bit Synchronous DRAM Application | - |
| dc.type | Article | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 0 | - |
| dc.citation.issue | 8 | - |
| dc.citation.beginningpage | 0 | - |
| dc.citation.endingpage | 0 | - |
| dc.citation.publicationname | IEICE TRANSACTIONS ON ELECTRONICS | - |
| dc.contributor.localauthor | Yoo, Hoi-Jun | - |
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