Giga-Bit급 DRAM을 위한 고유전 (Ba,Sr)TiO3 박막 커패시터의 유전완화 특성에 대한 회로 모델A Circuit Model of the Dielectric Relaxation of the High Dielectric (Ba,Sr) TiO3 Thin Film Capacitor for Giga-Bit Scale DRAMs
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Hui-Cheol | ko |
| dc.contributor.author | Jang, Byeong-Tak | ko |
| dc.contributor.author | Cha, Seon-Yong | ko |
| dc.date.accessioned | 2013-03-02T12:23:04Z | - |
| dc.date.available | 2013-03-02T12:23:04Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2000-04 | - |
| dc.identifier.citation | 전자공학회논문지, v.37, no.4, pp.253 - 262 | - |
| dc.identifier.issn | 1229-6368 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/73504 | - |
| dc.language | Korean | - |
| dc.publisher | 대한전자공학회 | - |
| dc.title | Giga-Bit급 DRAM을 위한 고유전 (Ba,Sr)TiO3 박막 커패시터의 유전완화 특성에 대한 회로 모델 | - |
| dc.title.alternative | A Circuit Model of the Dielectric Relaxation of the High Dielectric (Ba,Sr) TiO3 Thin Film Capacitor for Giga-Bit Scale DRAMs | - |
| dc.type | Article | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 37 | - |
| dc.citation.issue | 4 | - |
| dc.citation.beginningpage | 253 | - |
| dc.citation.endingpage | 262 | - |
| dc.citation.publicationname | 전자공학회논문지 | - |
| dc.contributor.localauthor | Lee, Hui-Cheol | - |
| dc.contributor.nonIdAuthor | Jang, Byeong-Tak | - |
| dc.contributor.nonIdAuthor | Cha, Seon-Yong | - |
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