A Testable Design Method of Digital Signal Processor디지탈 신호처리 프로세서의 테스터블 디자인 기법

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Publisher
대한전자공학회
Issue Date
1995-05
Language
Korean
Citation

전자공학회논문지A, v.32, no.5, pp.657 - 758

URI
http://hdl.handle.net/10203/72938
Appears in Collection
EE-Journal Papers(저널논문)
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