Array address translation for SDRAM-based video processing applications

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dc.contributor.authorKim, Hko
dc.contributor.authorPark, In-Cheolko
dc.date.accessioned2013-02-27T19:35:29Z-
dc.date.available2013-02-27T19:35:29Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1999-10-
dc.identifier.citationELECTRONICS LETTERS, v.35, no.22, pp.1929 - 1931-
dc.identifier.issn0013-5194-
dc.identifier.urihttp://hdl.handle.net/10203/70420-
dc.description.abstractTo increase the memory bandwidth of SDRAM (synchronous DRAM) that is commonly employed as external memory in video applications such as MPEG2, a memory address translation method is proposed for minimising the number of overhead cycles needed for row-activations and precharges. The features of SDRAM and the characteristics of memory accesses in video processing applications are considered to find a suitable address translation method. Experimental results show that the proposed method increases the memory bandwidth by 44% over that possible using conventional linear translation.-
dc.languageEnglish-
dc.publisherIEE-INST ELEC ENG-
dc.titleArray address translation for SDRAM-based video processing applications-
dc.typeArticle-
dc.identifier.wosid000087172500029-
dc.identifier.scopusid2-s2.0-0033355034-
dc.type.rimsART-
dc.citation.volume35-
dc.citation.issue22-
dc.citation.beginningpage1929-
dc.citation.endingpage1931-
dc.citation.publicationnameELECTRONICS LETTERS-
dc.contributor.localauthorPark, In-Cheol-
dc.contributor.nonIdAuthorKim, H-
dc.type.journalArticleArticle-
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