Browse "College of Engineering(공과대학)" by Subject DRAM▼amemory Controller▼anon-uniform access time▼aNUAT▼arank-level parallelism▼aRLP▼abank-group level parallelism▼aBGLP
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| Architectural techniques to reduce DRAM latency = DRAM 레이턴시를 줄이기 위한 아키텍처 연구link Shin, Wongyu; Kim, Lee-Sup; et al, 한국과학기술원, 2017 |
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