Showing results 1 to 4 of 4
8-Pipeline-Stage 32-bit Embedded Processor Using Dual Clock Domain Song, Jinook; Lee, Youngjoo; Kim, Bongjin; Park, In-Cheol, IEEE International SoC Design Conference (ISOCC 2011) Chip Design Contest, IEEE, 2011-11-17 |
Division-less High-Radix Interleaved Modular Multiplication Using a Scaled Modulus Song, Jinook; Park, In-Cheol, IEEE Internationsl SoC Design Conference (ISOCC 2011), pp.215 - 218, IEEE, 2011-11-17 |
Snoop-Free Multicore Architecture based on Dual-Core Clusters Kim, Bongjin; Song, Jinook; Kim, Chan Hyun; Kim, Eunchan; Park, In-Cheol, IEEE International SoC Design Conference (ISOCC 2012) Chip Design Contest, IEEE, 2012-11-05 |
Statistical modeling of capacitor mismatch effects for successive approximation register ADCs Lee, Youngjoo; Song, Jinook; Park, In-Cheol, IEEE Internationsl SoC Design Conference (ISOCC 2011), pp.302 - 305, IEEE, 2011-11-17 |
Discover