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A -240dB-FoMjitter and -115dBc/Hz PN @ 100kHz, 7.7GHz Ring-DCO-Based Digital PLL Using P/I-Gain Co-Optimization and Sequence-Rearranged Optimally Spaced TDC for Flicker-Noise Reduction Lee, Yongsun; Seong, Taeho; Lee, Jeonghyun; Hwanq, Chanwoong; Park, Hangi; Choi, Jaehyouk, 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020, pp.266 - 268, Institute of Electrical and Electronics Engineers Inc., 2020-02-19 |
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