Browse "College of Engineering(공과대학)" by Type Conference
Showing results 1061 to 1080 of 90924
| A 0.62mW Ultra-low-power Convolutional Neural Network Face Recognition Processor and a CIS Integrated with Always-on Haar-like Face Detector Bong, Kyeongryeol; Choi, Sungpill; Kim, Changhyeon; Kang, Sanghoon; Kim, Youchang; Yoo, Hoi-Jun, Internatioal Solid-State Circuits Conference, IEEE, 2017-02 |
| A 0.6pJ/b 3Gb/s/ch transceiver in 0.18 μm CMOS for 10mm on-chip interconnects Bae, Joonsung; Kim, Joo-Young; Yoo, Hoi-Jun, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp.2861 - 2864, Institute of Electrical and Electronics Engineers Inc., 2008-05-18 |
| A 0.75-6.75 GHz Receiver with a Digitally Controlled LO Generator for Software-Defined Radio Park, Chul Soon, 2010 IEEE International Microwave Workshop Series on RF Front-ends for Software Defined and Cognitive Radio Solution (IMWS), 2010-02-22 |
| A 0.78 mW Low-Power 4.02 High-Compression Ratio Less than 10(-6) BER Error-Tolerant Lossless Image Compression Hardware for Wireless Capsule Endoscopy System Lee, Jiwon; Lee, Kyoung-Rog; Yoo, Hoi-Jun, IEEE International Symposium on Circuits & Systems, IEEE International Symposium on Circuits & Systems, 2018-05 |
| A 0.791mm2 fully on-chip controller with self-error-correction for boost DC-DC converter based on Zero-Order Control Kong, Tae-Hwang; Hong, Sung-Wan; Lee, Sungwoo; Im, Jong-Pil; Cho, Gyu-Hyeong, 2012 IEEE Custom Integrated Circuits Conference, CICC 2012, pp.1 - 4, IEEE, 2012-09-10 |
| A 0.7fJ/bit/search, 2.2ns search time hybrid type TCAM architecture Choi, S.; Sohn, K.; Lee, M.-W.; Kim, S.; Choi, H.-M.; Kim, D.; Cho, U.-R.; et al, Digest of Technical Papers - 2004 IEEE International Solid-State Circuits Conference, v.47, pp.498 -, 2003-02-15 |
| A 0.7pJ/bit 2Gbps Self-synchronous Serial Link Receiver Using Gated-ring Oscillator for Inductive Coupling Communication Ha, Unsoo; Cho, Hyunwoo; Yoo, Hoi-Jun, IEEE International Symposium on Circuits and Systems (ISCAS), 2013, pp.1183 - 1186, IEEE, 2013-05-21 |
| A 0.7V 17fJ/Step-FOMW178.1dB-FOMSNDR10kHz-BW 560mVPPTrue-ExG Biopotential Acquisition System with Parasitic-Insensitive 421MΩ Input Impedance in 0.18m CMOS Lee, Sehwan; Choi, Yoonsung; Kim, Geunha; Baik, Seungyeob; Seol, Taeryoung; Jang, Homin; Lee, Doyoung; et al, 2022 IEEE International Solid-State Circuits Conference, ISSCC 2022, pp.336 - 338, Institute of Electrical and Electronics Engineers Inc., 2022-02 |
| A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed Tap Weighting Property in 65 nm CMOS Lee, Daewoong; Lee, Dongil; Kim, Yong-Hun; Kim, Lee-Sup, 33rd Symposium on VLSI Circuits, VLSI Circuits 2019, pp.C196 - C197, The IEEE Solid-State Circuits Society,The Japan Society of Applied Physics, 2019-06-12 |
| A 0.8V 82.9μW In-ear BCI Controller System with 8.8 PEF EEG Instrumentational Amplifier and Wireless BAN Transceiver Lee, Jaehyuk; Lee, Kyoung-Rog; Ha, Unsoo; Kim, Ji-Hoon; Lee, Kwonjoon; Yoo, Hoi-Jun, Symposia on VLSI Technology and Circuits, Symposia on VLSI Technology and Circuits, 2018-06 |
| A 0.8V, 37nW, 42ppm/degrees C Sub-Bandgap Voltage Reference with PSRR of-81dB and Line Sensitivity of 51ppm/V in 0.18um CMOS Kim, Myungjun; Cho, SeongHwan, 31st Symposium on VLSI Circuits, pp.C144 - C145, IEEE, 2017-06-07 |
| A 0.8V, 37nW, 42ppm/°C sub-bandgap voltage reference with PSRR of-81dB and line sensitivity of 51ppm/V in 0.18um CMOS Kim, Myungjun; Cho, SeongHwan, 31st Symposium on VLSI Circuits, VLSI Circuits 2017, pp.C144 - C145, Institute of Electrical and Electronics Engineers Inc., 2017-06 |
| A 0.9-v 67-uw analog front-end using adaptive-SNR technique for digital hearing aid Kim, S.; Lee, J.-Y.; Song, S.-J.; Cho, N.; Yoo, Hoi-Jun, IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005, pp.740 - 743, 2005-05-23 |
| A 0.9-V 96-uW Digital Hearing Aid Chip with Heterogeneous sigma-delta DAC Yoo, Hoi-Jun; Kim, Sunyoung; Cho, Namjun; Song, Seong-Jun; Kim, Donghyun; Kim, Kwanho, IEEE Symposium On VLSI Circuits (SOVC) 2006, pp.68 - 69, 2006 |
| A 0.95 mJ/frame DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation Han, Donghyeon; Im, DongSeok; Park, Gwangtae; Kim, Youngwoo; Song, Seokchan; Lee, Juhyoung; Yoo, Hoi-Jun, 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022, pp.37 - 40, Institute of Electrical and Electronics Engineers Inc., 2022-06 |
| A 0.9V 2.6mW body-coupled scalable PHY transceiver for body sensor applications Song, S.-J.; Cho, N.; Kim, S.; Yoo, J.; Choi, S.; Yoo, Hoi-Jun, 54th IEEE International Solid-State Circuits Conference, ISSCC 2007, pp.366 - 367, 2007-02-11 |
| A 0.9V 2MHz 6.4x-Slope-Boosted Quadrature-Phase Relaxation Oscillator with 164.2dBc/Hz FoM and 62.5ppm Period Jitter in 0.18μm CMOS Seong, Hoyong; Youn, Donghyun; Choi, Injun; Lee, Junghyup; Ha, Sohmyung; Je, Minkyu, 2023 IEEE Custom Integrated Circuits Conference (CICC), IEEE, 2023-04 |
| A 0.9V 6.3μW Multistage Amplifier Driving 500pF Capacitive Load with 1.34MHz GBW Qu, Wanyuan; Im, Jong Pil; Kim, Hyun Sik; Cho, Gyu-Hyeong, 2014 IEEE International Solid-State Circuits Conference, ISSCC 2014, pp.290 - 292, IEEE, 2014-02-11 |
| A 1 mW Current-Reused CMOS Differential LC-VCO with Low Phase Noise Lee, Sang-Gug, IEEE International Solid-State Circuits Conference, v.29, no.6, pp.0 - 0, IEEE International Solid-State Circuits Conference, 2005-02-01 |
| A 1 V 2.5 μW Fully-Differential ASK Demodulator with 12.5 pJ/bit FOM for Ultra-Low Power Biomedical Applications Baik, Seungyeob; George, Arup K.; Je, Minkyu; Lee, Junghyup, IEEE International Midwest Symposium on Circuits and Systems, IEEE, 2017-08-08 |
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