Optimisation of Montgomery modular multiplication algorithm for systolic arrays
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Shin, JB | ko |
| dc.contributor.author | Kim, J | ko |
| dc.contributor.author | Lee, Kwang-Hyung | ko |
| dc.date.accessioned | 2013-02-27T15:22:03Z | - |
| dc.date.available | 2013-02-27T15:22:03Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1998-09 | - |
| dc.identifier.citation | ELECTRONICS LETTERS, v.34, no.19, pp.1830 - 1831 | - |
| dc.identifier.issn | 0013-5194 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/69318 | - |
| dc.description.abstract | An improved systolic array for the Montgomery modular multiplication algorithm is presented. The recursive equation proposed by Waiter is explicitly transformed into Boolean algebraic equations. By analysing and optimising these equations, the improved systolic array can he made 20% faster than that proposed by Walter. | - |
| dc.language | English | - |
| dc.publisher | IEE-INST ELEC ENG | - |
| dc.title | Optimisation of Montgomery modular multiplication algorithm for systolic arrays | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000076287500023 | - |
| dc.identifier.scopusid | 2-s2.0-0032162654 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 34 | - |
| dc.citation.issue | 19 | - |
| dc.citation.beginningpage | 1830 | - |
| dc.citation.endingpage | 1831 | - |
| dc.citation.publicationname | ELECTRONICS LETTERS | - |
| dc.contributor.localauthor | Lee, Kwang-Hyung | - |
| dc.contributor.nonIdAuthor | Shin, JB | - |
| dc.contributor.nonIdAuthor | Kim, J | - |
| dc.type.journalArticle | Article | - |
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